In complex VLSI with circuits approaching 1 billion transistors, the major limiting factor to performance is interconnect. With continued scaling of semiconductors, this problem is becoming ever more serious. Potential new technologies such as molecular scale implementation have very limited interconnect capacity, making it a bottleneck to performance. The purpose of interconnect is communication, more specifically communication between distant points with a small latency. This thesis looks at the interconnect requirements of a circuit from an information theory perspective, considering the information rate of each connection in the circuit as opposed to physical connectivity.