Two new methods are proposed to implement the exclusive-OR and exclusive-NOR functions at the transistor level. The first method uses non-complementary signal input and the least number of transistors. The second method improves the performance but two additional transistors are utilized. The proposed method uses the same number of transistors but adds with more drive capability. These circuits were first implemented using a Physical Layout Design tool produced by Mentor Graphics. These layouts were extracted and simulated using circuit simulator HSPICE and ACCUSIM. Delay and power consumption of these circuits were characterized and compared with previously known designs.